2026.03.16

Congratulations! Hoichang Jeong and Seungbin Kim’s paper is accepted to IEEE Journal of Solid-State Circuits!

Congratulations! Hoichang Jeong and Seungbin Kim's paper is accepted to IEEE Journal of Solid-State Circuits. (equal contribution) In this paper, we propose a sparsity-aware analog–digital hybrid eDRAM computing-in-memory (CIM) processor for energy-efficient deep neural network (DNN) acceleration, addressing key efficiency limitations of prior CIM architectures. The design integrates input activation grouping convolution, a hybrid-CIM macro with SAR-Flash ADC and reversed-MAC logic, and sparsity-aware proactive scheduling to improve CIM macro utilization. Fabricated in 28 nm CMOS, the processor achieves 4.59× higher effective computation ratio and improves energy efficiency by 1.55× on ResNet-18 and 10.37× on VGGNet-16 compared with prior CIM processors.

2026.03.02

Congratulations! Jueun received the IEEE Solid-State Circuits Society (SSCS) Predoctoral Achievement Award!

Mr. Jueun Jung (Ph.D. student) of ISL, has received the IEEE Solid-State Circuits Society (SSCS) Predoctoral Achievement Award. The award recognizes a small number of exceptional Ph.D. students worldwide based on academic excellence, research promise, quality of publications, and alignment with the mission of the IEEE SSCS.

2026.02.23

Dongwook’s paper is highlighted by IEEE Transactions on Circuits and Systems I (TCAS-I)!

Congratulations! Dongwook's paper “A Multibit ReRAM Computing-in-Memory Processor With Adaptive Decision Level Nonlinear ADC for Ultra-Low-Energy Keyword Spotting in Mobile Devices” is highlighted by IEEE Transactions on Circuits and Systems I (TCAS-I)! You can watch Dongwook's Presentation Video here.

2026.02.23

Sunhong’s paper is highlighted by IEEE Transactions on VLSI Systems (TVLSI)!

Congratulations! Sunhong's paper "CINELL: An Energy-Efficient Compute-In/Near-Memory eDRAM Processor for Sparse Transformer-Based Large Language Models" is highlighted by IEEE Transactions on VLSI Systems (TVLSI)! This paper introduces CINELL, a compute-in/near-memory eDRAM processor designed to tackle the heavy computation and memory bandwidth demands of transformer-based LLMs. With attention block fusion, a CINM architecture, and compute-in-memory acceleration, CINELL delivers major gains in latency, memory access, and energy efficiency — enabling practical, high-performance LLM inference.

2025.12.01

Congratulations! Jueun and Sangho’s paper is accepted to IEEE International Solid-State Circuits Conference (ISSCC)!

Jueun and Sangho's paper “A 71.3mJ/frame End-to-End Driving Processor with Flexible Heterogeneous Core Orchestration via Sparsity Reasoning” is accepted to IEEE International Solid-State Circuits Conference (ISSCC)! Congratulations!

2025.10.22

Hoichang Jeong’s paper is published to JSSC!

Hoichang Jeong’s Paper “HYTEC: Compact and Energy-Efficient Analog-Digital Hybrid CIM With Transpose Ternary eDRAM” is accepted to JSSC 2025

2025.05.30

Hoichang Jeong and Seungbin Kim’s Paper is accepted to ESSERC!

Hoichang Jeong* & Seungbin Kim*’s Paper "A 30.7 TOPS/W Sparsity-Aware Analog-Digital Hybrid eDRAM CIM by Effective Row Activation with Simultaneous Multi-Row-Multi-Task Control" is accepted to ESSERC 2025 (* Equal Contribution)

2025.05.30

Bokyoung Seo’s paper is published to JSSC!

Bokyoung Seo’s paper "A LiDAR-PNN Pipelined Processor with Cylindrical Bin Partitioning and Halo Indexing for 3D Perception in Outdoor Autonomous Driving Applications" is published to JSSC!

2025.03.05

Congratulations! Jueun Received the Demonstration Session Award at IEEE International Solid-State Circuit Conference (ISSCC).

Jueun Received the Demonstration Session Award at IEEE International Solid-State Circuit Conference (ISSCC).

2025.01.02

Congratulations! Jueun Received the Excellence Award at the 1st AI Semiconductor Technology Talent Competition.

Jueun Received the Excellence Award at the 1st AI Semiconductor Technology Talent Competition.

2024.11.10

Congratulations! Jueun Recieved Prime Minister’s Award from Semiconductor Design Contest

ISL received Prime Minister's Award from Semiconductor Design Contest

2024.08.26

Bokyoung Seo’s Paper is accepted to A-SSCC

Bokyoung Seo’s Paper is accepted to A-SSCC’s paper “LPNA: A 2.75 ms Low-Latency and 0.40 uJ/point Energy-Efficient LiDAR Point-Cloud Neural Network Accelerator with Cylindrical Bin Partitioning” is accepted to A-SSCC!