minsookim26@yonsei.ac.kr
Minsoo Kim
Master Candidate
Introduction
My research interests lie in designing CIM/PIM architectures based on analog computing technologies to realize ultra-low-power AI accelerators that surpass the limitations of conventional digital computing.
Education
2021.03 - 2026.02 B.S. in Electrical and Electronic Engineering at Yonsei University
2026.03 - M.S. in Electrical and Electronic Engineering at Yonsei University
Research Interest
Processing in Memory
Computing in Memory
Analog Computing
International Conference
Circuit
Processing-in-memory
Large-Language-Model
QUARC: A Compact and Energy-Efficient Quad-Mode Reconfigurable Analog-Digital Hybrid eDRAM CIM for Ternary-LLM Acceleration
IEEE International Symposium on Integrated Circuits and Systems, Dec. 2026
Hoichang Jeong, Minsoo Kim, Gyumin Choi, and Kyuho Jason Lee
Circuit
Processing-in-memory
A 77.1 TOPS/W Simultaneous Refresh-Compute eDRAM CIM Macro with Input-Aware ADC and Effective-Bit Reconfigurable Accumulator
IEEE European Solid-State Electronics Research Conference, Sept. 2026
Hoichang Jeong, Seungbin Kim, Gyumin Choi, Minsoo Kim, and Kyuho Jason Lee
Domestic Conference
Journal Publication
Circuit
Processing-in-memory
Large-Language-Model
QUARC: A Compact and Energy-Efficient Quad-Mode Reconfigurable Analog-Digital Hybrid eDRAM CIM for Ternary-LLM Acceleration
IEEE Transactions on Circuits and Systems I (T-CAS I), (Early Access), 2026
Hoichang Jeong, Minsoo Kim, Gyumin Choi, and Kyuho Jason Lee
Awards
1
제27회 반도체설계대전 산업통상부장관상 (2026.10)
김승빈, 최규민, 김민수, 이수안, 홍준서, 주형우, 박수민
Patents