A 30.7 TOPS/W Sparsity-Aware Analog-Digital Hybrid eDRAM CIM by Effective Row Activation with Simultaneous Multi-Row-Multi-Task Control

IEEE European Solid-State Electronics Research Conference (ESSERC), 2025

Hoichang Jeong^*, Seungbin Kim^*, Jueun Jung, and Kyuho Jason Lee (*equal contribution)

A 46 TOPS/W In-/Near-Memory Computing Processor for Large Language Model with Extended Sparse Attention

IEEE International Symposium on Circuits and Systems (ISCAS), 2025

Sunhong An, Hoichang Jeong, Seungbin Kim, Keonhee Park, Dongwook Kim, and Kyuho Lee

A 0.74 uj/decision and 22.59 Tops/W Keyword Spotting CIM Processor with Short-Current-Free Multi-level ReRAM and Adaptive-Decision-Level Nonlinear ADC

IEEE International Symposium on Circuits and Systems (ISCAS), 2025

Dongwook Kim, Hoichang Jeong, Keonhee Park, Seungbin Kim, Sunhong An, and Kyuho Lee

A 273.48 TOPS/W and 1.58 Mb/mm2 Analog-Digital Hybrid CIM Processor with Transpose Ternary-eDRAM Bitcell

IEEE Asian Solid-State Circuits Conference (A-SSCC), 2024

Hoichang Jeong, Seungbin Kim, Jeongmin Shin, Keonhee Park, and Kyuho Jason Lee

A 28-nm 323 TOPS/mm2/b and 2007 TOPS/W/b Ternary Latch Based Sparsity-Aware CIM Macro With Double-Sampling Ternary ADC

IEEE Asian Solid-State Circuits Conference (A-SSCC), 2024

Myoung Kim, Hoichang Jeong, Woo-Seok Kim, Yesong Jeong, Young-Eun Choi, Junyoung Park, Min Woo Ryu, Yong Kyu Lee, Kyuho Jason Lee, and Kyung Rok Kim

DPIM: A 19.36TOPS/W 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core

IEEE European Solid-State Electronics Research Conference (ESSERC), 2024

Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Hoichang Jeong, Keonhee Park, Ki-soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin Kim, Jaemin Kim, Kyuho Lee, Joo-Hyung Chae, Kunhee Cho, and Joo-Young Kim

A Low-power 3D Point Clouds Matching Processor with 1D-CNN Prediction and CAM-based In-memory kNN Searching

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2024

Jeongmin Shin, Hoichang Jeong, Seungbin Kim, Keonhee Park, Sangho Lee, and Kyuho Lee

A 701.7 TOPS/W Time-Domain Spiking Neural Network Compute-in-Memory Processor with 9T1C Bitcell

IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2023

Keonhee Park, Hoichang Jeong, and Kyuho Lee

A Ternary Neural Network Computing-in-Memory Processor with 16T1C Bitcell Architecture

IEEE International Symposium on Circuits and Systems (ISCAS), 2023

Hoichang Jeong, Keonhee Park, and Kyuho Lee

A Real-Time Sparsity-Aware 3D-CNN Processor for Mobile Hand Gesture Recognition

IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022

Seungbin Kim, Jueun Jung, Wuyoung Jang, Hoichang Jeong, and Kyuho Lee

An Energy-Efficient CNN Accelerator for Multi-object Real-Time Semantic Segmentation in Autonomous Vehicle

IEEE International Symposium on Circuits and Systems (ISCAS), 2022

Jueun Jung, Seungbin Kim, Wuyoung Jang, Hoichang Jeong, and Kyuho Lee

Ternary Neural Network 가속을 위한 Ternary Processing-In-Memory Processor

제 5회 반도체공학회 종합학술대회 및 정기총회 (반도체공학회), 2022

정회창, 박건희, 이규호

Bitcell 기반 Ternary MAC Processing-In-Memory

2022년도 반도체공학회 하계학술대회 (반도체공학회), 2022

정회창, 박건희, 이규호

HYTEC: Compact and Energy-Efficient Analog-Digital Hybrid CIM With Transpose Ternary eDRAM

IEEE Journal of Solid-State Circuits (JSSC), (Accepted), 2025

Hoichang Jeong, Seungbin Kim, Jeongmin Shin, and Kyuho Jason Lee

CINELL: An Energy-Efficient Compute-in/near-Memory eDRAM Processor for Sparse Transformer-Based Large Language Models

IEEE Transactions on Very Large Scale Integration (T-VLSI), (Accepted), 2025

Sunhong An, Hoichang Jeong, Seungbin Kim, and Kyuho Jason Lee

DPIM: A 2T1C eDRAM Transformer-in-Memory Chip with Sparsity-Aware Quantization and Heterogeneous Dense-Sparse Core

IEEE Journal of Solid-State Circuits (JSSC), (Early Access), 2025

Donghyuk Kim, Jae-Young Kim, Hyunjun Cho, Seungjae Yoo, Sukjin Lee, Sungwoong Yune, Sejeong Yang, Hoichang Jeong, Keonhee Park, Ki-Soo Lee, Jongchan Lee, Chanheum Han, Gunmo Koo, Yuli Han, Jaejin Kim, Jaemin Kim, Kyuho Jason Lee, Joo-Hyung Chae, Kunhee Cho, and Joo-Young Kim

A Multibit ReRAM Computing-in-Memory Processor with Adaptive Decision Level Nonlinear ADC for Ultra-low-energy Keyword Spotting in Mobile Devices

IEEE Transactions on Circuits and Systems I (T-CAS I): Regular Papers (Early Access), 2025

Dongwook Kim, Hoichang Jeong, Seungbin Kim, Heein Yoon, and Kyuho Jason Lee

C²IM-NN: A Low-power 3D Point Clouds Matching Processor with 1D-CNN Prediction and CAM-based In-memory k-NN Searching

IEEE Transactions on Circuits and Systems I (T-CAS I): Regular Papers, vol. 72, no. 7, pp. 3286-3297, 2025

Jeongmin Shin, Hoichang Jeong, Seungbin Kim, Keonhee Park, Sangho Lee, and Kyuho Jason Lee

A 701.7 TOPS/W Compute-in-Memory Processor with Time-Domain Computing for Spiking Neural Network

IEEE Transactions on Circuits and Systems I (T-CAS I): Regular Papers, vol. 72, no. 1, pp. 25-35, 2025

Keonhee Park, Hoichang Jeong, Seungbin Kim, Jeongmin Shin, Minseo Kim, and Kyuho Jason Lee

A Ternary Neural Network Computing-in-Memory Processor with 16T1C Bitcell Architecture

IEEE Transactions on Circuits and Systems II (T-CAS II): Express Briefs, vol. 70, no. 5, pp. 1739-1743, 2023

Hoichang Jeong, Seungbin Kim, Keonhee Park, Jueun Jung, and Kyuho Lee