Master

ETRI

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AI System-on-Chip for Autonomous Mobility

HW-SW Co-optimization

DNN Hardware Accelerator

---

Master

 

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Processing-In-Memory

Computer Architecture

Analog IC

---

Master

 

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AI System-on-Chip

Large Language Models

HW-SW Co-optimization

---

Master

 

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Processing in Memory

LLM

Processor and SoC Architecture

---

Master

Ph.D. at UNIST

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Processing-in-Memory Architecture

Intelligent 3D Vision System-on-Chip

Energy-efficient ASIC Design

---

Master

ETRI

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Processng-in-Memory

Mixed-signal ML Hardware

Neuromorphic SoC

---

Master

Samsung Electronics

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Accelerating AI computing

DB Searching Accelerator

---

Master

Ph.D.

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HW-SW Co-optimization for Autonomous Driving Systems

Multi-Classifier SoC Architecture

Network-on-Chip

---

Master

 

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HW-SW Co-Optimization

AI System-on-Chip

DNN Accelerator Architecture

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Postdoctoral Researcher at Yonsei Univ.

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HW-SW Co-optimization

Energy-efficient DNN Accelerator

AI System-on-Chip for Autonomous Mobility

---

Master

Postdoctoral Researcher at Yonsei Univ.

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Processing in Memory

Computing in Memory

Analog Computing

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